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Digital Design Engineer, Principal

Inphi Corporation Careers – Santa Clara, California



Experience with SerDes, Clock and Data Recovery, Linear and non-linear equalization techniques (e.g., DFE), and adaptation algorithms



Salary : $54116 - $850000  / YEAR

 rnrnThe Senior Principal DSP Engineer will be responsible to specify, architect and implement a groundbreaking solution with respect to future optical communications for Datacenter and Enterprise market segments.  The Candidate The Principal Engineer will possess 12 years professional experience reflective of a strong high speed IC design expertise in CMOS. The successful candidate must have a proven record of implementing advanced signal processing algorithms at speeds beyond 10G and has successfully placed multiple products into volume production.  Technical Description  rnrn rnrnContribute to architecting and defining the specifications for different  PHY productsrnrnImplement algorithms for multilevel modulation, adaptive equalizers, clock recovery, digitally assisted analog, FEC, digital filters, and interface/integration with analog functions.rnrnWell versed with the complete ASIC flow from micro-architecture to customer deploymentrnrnGood understanding of low-power DSP implementationsrnrnExperience with Multi-VT/Multi-Channel low-feature size technology nodesrnrn rnrn  Requirements:  rnrnBachelors, Masters or PhD with minimum 12+ years of experience (or equivalent) in multi-million gates digital/mixed-signal IC design at 65, 40nm, 28nm or smaller technology.rnrnExperience of entire design cycle from micro-architecture specification definition, design to post-silicon debug and support in lab environment.rnrnExperience with SerDes, Clock and Data Recovery, Linear and non-linear equalization techniques (e.g., DFE), and adaptation algorithmsrnrnExperience with multi-level signalingrnrn rnrn rn

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