CHA*****************
*************
c.w******************
562*********
Work Details
Work Authorization : F1
Expected Salary : Negotiable
Designation PHYSICAL DESIGN INTERN
Key Skills C, VHDL, System Verilog, Verilog, TCL, Python, Perl
Educational Background
| Degree | College/University | City | Started | Ending |
|---|---|---|---|---|
| Master of Science in Electrical Engineering | CALIFORNIA STATE UNIVERSITY | Long Beach CA | 2019 | 0 |
